Datasheet

Section 22 Flash Memory
Rev. 3.00 Sep. 28, 2009 Page 675 of 910
REJ09B0350-0300
Section 22 Flash Memory
The flash memory has the following features. Figure 22.1 is a block diagram of the flash memory.
22.1 Features
• Size
Product Classification ROM Size ROM Address
H8S/2117 R4F2117 160 kbytes H'000000 to H'027FFF (mode 2)
• Two flash-memory MATs according to LSI initiation mode.
The on-chip flash memory has two memory spaces in the same address space (hereafter
referred to as memory MATs). The mode setting at initiation determines which memory MAT
is initiated first.
The MAT can be switched by using the bank-switching method after initiation.
⎯ The user memory MAT is initiated at a power-on reset in user mode: 160 Kbytes.
⎯ The user boot memory MAT is initiated at a power-on reset in user boot mode: 8 Kbytes.
• Programming/erasing interface by the download of on-chip program
This LSI has a programming/erasing program. After downloading this program to the on-chip
RAM, programming/erasing can be performed by setting the parameters.
• Programming/erasing time
Programming time: 1 ms (typ) for 128-byte simultaneous programming, 7.8 μs per byte
Erasing time: 600 ms (typ) per 1 block (64 kbytes)
• Number of programming
The number of programming can be up to 100 times at the minimum. (1 to 100 times are
guaranteed.)
• Three on-board programming modes
Boot mode: Using the on-chip SCI-1, the user MAT can be programmed/erased. In boot mode,
the bit rate between the host and this LSI can be adjusted automatically.
User program mode: Using a desired interface, the user MAT can be programmed/erased.
User boot mode: The User boot program of The optional interface can be made and The User
MAT can beprogrammed.
• Off-board programming mode
Programmer mode: Using a PROM programmer, the user MAT can be programmed/erased.