Datasheet

Section 20 A/D Converter
Rev. 3.00 Sep. 28, 2009 Page 662 of 910
REJ09B0350-0300
20.3.3 A/D Control Register (ADCR)
ADCR enables A/D conversion started by an external trigger signal.
Bit Bit Name Initial Value R/W Description
7
6
TRGS1
TRGS0
0
0
R/W
R/W
Timer Trigger Select 1 and 0
Enable the start of A/D conversion by a trigger signal.
00: A/D conversion start by external trigger is disabled
01: A/D conversion start by conversion trigger from
TPU
10: A/D conversion start by conversion trigger from
TMR
11: Setting prohibited
5
4
SCANE
SCANS
0
0
R/W
R/W
Scan Mode
Select the A/D conversion operating mode.
0X: Single mode
10: Scan mode
Continuous A/D conversion on 1 to 4 channels
11: Scan mode
Continuous A/D conversion on 1 to 8 channels
3
2
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0
These bits select the clock (ADCLK)* used in A/D
conversion. Set these bits while the ADST bit in
ADCSR is 0, then set the conversion mode.
00: φ
01: φ/2
10: φ/4
00: φ/8
1 ADSTCLR 0 R/W A/D Start Clear
Sets the automatic clearing of the ADST bit in scan
mode.
0: Disables the automatic clearing of the ADST bit in
scan mode
1: Automatically clears the bit when A/D conversion of
all of the selected channels are completed