Datasheet

Section 19 LPC Interface (LPC)
Rev. 3.00 Sep. 28, 2009 Page 600 of 910
REJ09B0350-0300
R/W
Bit Bit Name
Initial
Value
Slave Host Description
4 LRSTB 0 R/W ⎯ LPC Software Reset Bit
Resets the LPC interface. For the scope of initialization
by an LPC reset, see section 19.4.4, LPC Interface
Shutdown Function (LPCPD).
0: Normal state
[Clearing conditions]
• Writing 0
• LPC hardware reset
1: LPC software reset state
[Setting condition]
Writing 1 after reading LRSTB = 0
3 SDWNB 0 R/W ⎯ LPC Software Shutdown Bit
Controls LPC interface shutdown. For details of the
LPC shutdown function, and the scope of initialization
by an LPC reset and an LPC shutdown, see section
19.4.4, LPC Interface Shutdown Function (LPCPD).
0: Normal state
[Clearing conditions]
• Writing 0
• LPC hardware reset or LPC software reset
• LPC hardware shutdown
(falling edge of LPCPD signal when SDWNE = 1)
• LPC hardware shutdown release
(rising edge of LPCPD signal when SDWNE = 0)
1: LPC software shutdown state
[Setting condition]
Writing 1 after reading SDWNB = 0
2 PMEB 0 R/W ⎯ PME Output Bit
Controls PME output in combination with the PMEE
bit. For details, refer to description on the PMEE bit in
HICR0.
1 LSMIB 0 R/W ⎯ LSMI Output Bit
Controls LSMI output in combination with the LSMIE
bit. For details, refer to description on the LSMIE bit in
HICR0.