Datasheet

Section 18 Keyboard Buffer Control Unit (PS2)
Rev. 3.00 Sep. 28, 2009 Page 561 of 910
REJ09B0350-0300
Section 18 Keyboard Buffer Control Unit (PS2)
This LSI has four on-chip keyboard buffer control unit (PS2) channels. The PS2 is provided with
functions conforming to the PS/2 interface specifications.
Data transfer using the PS2 employs a data line (KD) and a clock line (KCLK), providing
economical use of connectors, board surface area, etc. Figure 18.1 shows a block diagram of the
PS2.
18.1 Features
• Conforms to PS/2 interface specifications
• Direct bus drive (via the KCLK and KD pins)
• Interrupt sources: on completion of data reception/transmission, on detection of clock falling
edge, and on detection of the first falling edge of a clock
• Error detection: parity error, stop bit monitoring, and receive notify monitoring