Datasheet

Section 1 Overview

Rev. 3.00 Sep. 28, 2009 Page 2 of 910

REJ09B0350-0300

1.1.2 Overview of Functions

Table 1.1 lists the functions of this LSI in outline.

Table 1.1 Overview of Functions

Classification

Module/

Function

Description

ROM

• ROM lineup: Flash memory version

H8S/2117: 160 Kbytes

Memory

RAM

• RAM capacity: 8 Kbytes

CPU CPU

• 16-bit high-speed H8S/2600 CPU (CISC type)

Upward-compatibility with H8/300, H8/300H, and H8S CPUs at

object level

• General-register architecture (sixteen 16-bit general registers)

• Eight addressing modes

• 4-Gbyte address space

Program: 4 Gbytes available

Data: 4 Gbytes available

• 69 basic instructions (bit arithmetic and logic instructions,

multiply and divide instructions, bit manipulation instructions,

multiply-and-accumulate instructions, and others)

• Minimum instruction execution time: 50.0 ns (for an ADD

instruction while system clock φ = 20 MHz and

= 3.0 to 3.6 V)

• On-chip multiplier (16 × 16 → 32 bits)

• Supports multiply-and-accumulate instructions

(16 × 16 + 32 → 32 bits)

Operating

mode

• Advanced and single-chip modes