Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 3.00 Sep. 28, 2009 Page 421 of 910
REJ09B0350-0300
Table 15.6 Maximum Bit Rate with External Clock Input (Asynchronous Mode)
φ (MHz)
External Input
Clock (MHz)
Maximum Bit
Rate (bit/s) φ (MHz)
External Input
Clock (MHz)
Maximum Bit
Rate (bit/s)
8 2.0000 125000 14.7456 3.6864 230400
9.8304 2.4576 153600 16 4.0000 250000
10 2.5000 156250 17.2032 4.3008 268800
12 3.0000 187500 18 4.5000 281250
12.288 3.0720 192000 19.6608 4.9152 307200
14 3.5000 218750 20 5.0000 312500
Table 15.7 BRR Settings for Various Bit Rates (Clocked Synchronous Mode)
Operating Frequency φ (MHz)
8 10 16 20
Bit Rate (bit/s) n N n N n N n N
110
250 3 124 ⎯ ⎯ 3 249
500 2 249 ⎯ ⎯ 3 124 ⎯ ⎯
1k 2 124 ⎯ ⎯ 2 249 ⎯ ⎯
2.5k 1 199 1 249 2 99 2 124
5k 1 99 1 124 1 199 1 249
10k 0 199 0 249 1 99 1 124
25k 0 79 0 99 0 159 0 199
50k 0 39 0 49 0 79 0 99
100k 0 19 0 24 0 39 0 49
250k 0 7 0 9 0 15 0 19
500k 0 3 0 4 0 7 0 9
1M 0 1 0 3 0 4
2.5M 0 0* 0 1
5M 0 0*
[Legend]
Blank: Setting prohibited.
⎯ : Can be set, but there will be a degree of error.
*: Continuous transfer or reception is not possible.