Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 3.00 Sep. 28, 2009 Page 416 of 910
REJ09B0350-0300
Bit Bit Name Initial Value R/W Description
2 TEND 1 R Transmit End
TEND is set to 1 when the receiving end
acknowledges no error signal and the next
transmit data is ready to be transferred to TDR.
[Setting conditions]
• When both TE and EPS in SCR are 0
• When ERS = 0 and TDRE = 1 after a specified
time passed after the start of 1-byte data
transfer. The set timing depends on the
register setting as follows.
• When GM = 0 and BLK = 0, 2.5 etu*
2
after
transmission start
• When GM = 0 and BLK = 1, 1.5 etu*
2
after
transmission start
• When GM = 1 and BLK = 0, 1.0 etu*
2
after
transmission start
• When GM = 1 and BLK = 1, 1.0 etu*
2
after
transmission start
[Clearing condition]
When 0 is written to TDRE after reading TDRE = 1
1 MPB 0 R Multiprocessor Bit
Not used in smart card interface mode.
0 MPBT 0 R/W Multiprocessor Bit Transfer
Write 0 to this bit in smart card interface mode.
Notes: 1. Only 0 can be written to clear the flag.
2. etu: Element Time Unit (time taken to transfer one bit)