Datasheet

Section 13 8-Bit Timer (TMR)
Rev. 3.00 Sep. 28, 2009 Page 381 of 910
REJ09B0350-0300
13.7.3 Input Capture Operation
TMR_X has input capture registers (TICRR and TICRF). A narrow pulse width can be measured
with TICRR and TICRF, using a single capture. If the falling edge of TMRIX (TMR_X input
capture input signal) is detected after its rising edge has been detected, the value of TCNT_X at
that time is transferred to both TICRR and TICRF.
(1) Input Capture Signal Input Timing
Figure 13.11 shows the timing of the input capture operation.
φ
TMRIX
Input capture
signal
TCNT_X n
nn
m
M
m
N + 1N
N
n + 1
TICRR
TICRF
Figure 13.11 Timing of Input Capture Operation
If the input capture signal is input while TICRR and TICRF are being read, the input capture
signal is delayed by one system clock (φ) cycle. Figure 13.12 shows the timing of this operation.
φ
TMRIX
TICRR, TICRF read cycle
T
1
T
2
Input capture
signal
Figure 13.12 Timing of Input Capture Signal
(Input capture signal is input during TICRR and TICRF read)