Datasheet

Section 13 8-Bit Timer (TMR)
Rev. 3.00 Sep. 28, 2009 Page 373 of 910
REJ09B0350-0300
Table 13.4 Registers Accessible by TMR_X/TMR_Y
TMRX/Y H'FFF0 H'FFF1 H'FFF2 H'FFF3 H'FFF4 H'FFF5 H'FFF6 H'FFF7
0 TMR_X
TCR_X
TMR_X
TCSR_X
TMR_X
TICRR
TMR_X
TICRF
TMR_X
TCNT
TMR_X
TCORC
TMR_X
TCORA_X
TMR_X
TCORB_X
1 TMR_Y
TCR_Y
TMR_Y
TCSR_Y
TMR_Y
TCORA_Y
TMR_Y
TCORB_Y
TMR_Y
TCNT_Y
TMR_Y
13.3.10 Timer XY Control Register (TCRXY)
TCRXY selects the TMR_X and TMR_Y output pins and internal clock.
Bit Bit Name
Initial
Value
R/W Description
7, 6 ⎯ All 0 R/W Reserved
The initial value should not be changed.
5 CKSX 0 R/W TMR_X Clock Select
For details about selection, see table 13.3.
4 CKSY 0 R/W TMR_Y Clock Select
For details about selection, see table 13.3.
3 to 0 — All 0 R/W Reserved
The initial value should not be changed.