Datasheet

Section 13 8-Bit Timer (TMR)
Rev. 3.00 Sep. 28, 2009 Page 369 of 910
REJ09B0350-0300
Bit Bit Name
Initial
Value
R/W Description
5 OVF 0 R/(W)* Timer Overflow Flag
[Setting condition]
When TCNT_X overflows from H'FF to H'00
[Clearing condition]
Read OVF when OVF = 1, then write 0 in OVF
4 ICF 0 R/(W)* Input Capture Flag
[Setting condition]
When a rising edge and falling edge is detected in the
external reset signal in that order.
[Clearing condition]
Read ICF when ICF = 1, then write 0 in ICF
3
2
OS3
OS2
0
0
R/W
R/W
Output Select 3 and 2
These bits specify how the TMOX pin output level is to
be changed by compare-match B of TCORB_X and
TCNT_X.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
1
0
OS1
OS0
0
0
R/W
R/W
Output Select 1 and 0
These bits specify how the TMOX pin output level is to
be changed by compare-match A of TCORA_X and
TCNT_X.
00: No change
01: 0 is output
10: 1 is output
11: Output is inverted (toggle output)
Note: * Only 0 can be written, for flag clearing.