Datasheet

Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 3.00 Sep. 28, 2009 Page 337 of 910
REJ09B0350-0300
Bit Bit Name
Initial
Value
R/W Description
3 ICPF 0 R/(W)* Input Capture Generation
In timer mode, this flag indicates that the value in TDPCNT
was transferred to TDPICR when an input capture signal
was generated. This flag is set when the input capture
signal selected by the IEDG bit is generated on the
TDPCYI input pin.
In cycle measurement mode, this flag indicates that the
value in TDPCNT was transferred to TDPICR when the
rising or falling edge of the PWM waveform was detected.
[Setting condition]
• When an input capture signal is generated
[Clearing condition]
• Reading ICPF when ICPF = 1 and then writing 0 to
ICPF
2 CMF 0 R/(W)* Compare Match Flag (valid only in timer mode)
[Setting condition]
• When the TDPCNT value matches the TDPWDMX
value in timer mode
[Clearing condition]
• Reading CMF when CMF = 1 and then writing 0 to
CMF
Note: In cycle measurement mode, even though the
TDPCNT value matches the TDPWDMX value, CMF
is not set to 1.
1 CKSEG 0 R/(W)* External Clock Edge Select
When CKS2 to CKS0 in TDPCR1 are set to B'111
(external clock), this bit selects the edge for counting of the
external count clock edges.
0: Falling edges of the external clock are counted
1: Rising edges of the external clock are counted