Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TFLGA 145 (9x9) 16-Bit 20 MHz I/O number 112

Section 11 16-Bit Cycle Measurement Timer (TCM)

Rev. 3.00 Sep. 28, 2009 Page 306 of 910

REJ09B0350-0300

Figure 11.1 is a block diagram of the TCM.

φ/2, φ/8, φ/16, φ/32

φ/64, φ/128, φ/256

Clock selection

TCMCNT

Comparator

TCMMLCM

TCMICR

TCMICRF

TCMCSR

TCMCKI

TCMMCI

External clock

Internal clock

TCMCYI

Compare matrch

Cycle upper limit overflow

Cycle lower limit underflow

Overflow

Control

logic

Clear

Input capture

TCMIER

TCMCR

TICI

TCMI

TOVMI

TUDI

TOVI

[Legend]

TCMCNT:

TCMMLCM:

TCMMINCM:

TCMICR:

TCMICRF:

TCMCSR:

TCMIER:

TCMCR:

TCM timer counter

TCM cycle upper limit register

TCM cycle lower limit register

TCM input capture register

TCM input capture buffer register

TCM status register

TCM interrupt enable register

TCM control register

TCMMINCM

Module data bus

Figure 11.1 Block Diagram of the TCM