Datasheet

Rev. 3.00 Sep. 28, 2009 Page xxxiii of xliv
REJ09B0350-0300
Section 8 8-Bit PWM Timer (PWMU)............................................................197
8.1 Features.............................................................................................................................. 197
8.2 Input/Output Pins............................................................................................................... 199
8.3 Register Descriptions ......................................................................................................... 200
8.3.1 PWM Control Register A (PWMCONA) ............................................................. 202
8.3.2 PWM Control Register B (PWMCONB).............................................................. 202
8.3.3 PWM Control Register C (PWMCONC).............................................................. 205
8.3.4 PWM Control Register D (PWMCOND) ............................................................. 206
8.3.5 PWM Prescaler Registers 0 to 5 (PWMPRE0 to PWMPRE5) ............................. 207
8.3.6 PWM Duty Setting Registers 0 to 5 (PWMREG0 to PWMREG5) ...................... 209
8.4 Operation ........................................................................................................................... 210
8.4.1 Single-Pulse Mode (8 Bits, 16 Bits)...................................................................... 210
8.4.2 Pulse Division Mode............................................................................................. 214
8.5 Usage Note......................................................................................................................... 217
8.5.1 Setting Module Stop Mode ................................................................................... 217
8.5.2 Note on Using 16-Bit Single-Pulse PWM Timer.................................................. 217
Section 9 14-Bit PWM Timer (PWMX)..........................................................219
9.1 Features.............................................................................................................................. 219
9.2 Input/Output Pins............................................................................................................... 220
9.3 Register Descriptions ......................................................................................................... 220
9.3.1 PWMX (D/A) Counter (DACNT) ........................................................................ 221
9.3.2 PWMX (D/A) Data Registers A and B (DADRA and DADRB).......................... 222
9.3.3 PWMX (D/A) Control Register (DACR) ............................................................. 224
9.3.4 Peripheral Clock Select Register (PCSR) ............................................................. 225
9.4 Bus Master Interface.......................................................................................................... 226
9.5 Operation ........................................................................................................................... 229
9.6 Usage Notes ....................................................................................................................... 236
9.6.1 Module Stop Mode Setting ................................................................................... 236
Section 10 16-Bit Timer Pulse Unit (TPU) .......................................................237
10.1 Features.............................................................................................................................. 237
10.2 Input/Output Pins............................................................................................................... 241
10.3 Register Descriptions ......................................................................................................... 242
10.3.1 Timer Control Register (TCR).............................................................................. 243
10.3.2 Timer Mode Register (TMDR)............................................................................. 247
10.3.3 Timer I/O Control Register (TIOR)...................................................................... 249
10.3.4 Timer Interrupt Enable Register (TIER)............................................................... 258
10.3.5 Timer Status Register (TSR)................................................................................. 260