Datasheet

Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Sep. 28, 2009 Page 264 of 910
REJ09B0350-0300
10.3.9 Timer Synchro Register (TSYR)
TSYR selects independent operation or synchronous operation for the channel 0 to 2 TCNT
counters. A channel performs synchronous operation when the corresponding bit in TSYR is set to
1.
Bit Bit Name
Initial
value
R/W Description
7 to 3 ⎯ All 0 R/W Reserved
The initial value should not be changed.
2
1
0
SYNC2
SYNC 1
SYNC 0
0
0
0
R/W
R/W
R/W
Timer Synchro 2 to 0
These bits select whether operation is independent of
or synchronized with other channels.
When synchronous operation is selected, synchronous
presetting of multiple channels, and synchronous
clearing through counter clearing on another channel
are possible.
To set synchronous operation, the SYNC bits for at
least two channels must be set to 1. To set
synchronous clearing, in addition to the SYNC bit, the
TCNT clearing source must also be set by means of
bits CCLR2 to CCLR0 in TCR.
0: TCNT_n operates independently
(TCNT presetting /clearing is unrelated to other
channels)
1: TCNT_n performs synchronous operation
TCNT synchronous presetting/synchronous clearing
is possible
(n = 2 to 0)