Datasheet

Section 7 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 175 of 910
REJ09B0350-0300
(7) PC1/WUE9/TIOCB0
The pin function is switched as shown below according to the combination of the register setting
of the TPU and the PC1DDR bit. When the WUEMR9 bit in WUEMR of the interrupt controller
is cleared to 0, this pin can be used as the WUE9 input pin.
This pin functions as TIOCB0 input when TPU channel 0 timer operating mode is set to normal
operation or phase counting mode and IOB3 to IOB0 in TIORH_0 are set to B'10xx. (x: Don’t
care.)
Setting
TPU I/O Port
Module
Name
Pin Function
TIOCB0_OE PC1DDR
TPU TIOCB0 output 1 ⎯
I/O port PC1 output 0 1
PC1 input
(initial setting)
0 0
(8) PC0/WUE8/TIOCA0
The pin function is switched as shown below according to the combination of the register setting
of the TPU and the PC0DDR bit. When the WUEMR8 bit in WUEMR of the interrupt controller
is cleared to 0, this pin can be used as the WUE8 input pin.
This pin functions as TIOCA0 input when TPU channel 0 timer operating mode is set to normal
operation or phase counting mode and IOA3 to IOA0 in TIORH_0 are set to B'10xx. (x: Don’t
care.)
Setting
TPU I/O Port
Module
Name
Pin Function
TIOCA0_OE PC0DDR
TPU TIOCA0 output 1 ⎯
I/O port PC0 output 0 1
PC0 input
(initial setting)
0 0