Datasheet

Section 7 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 159 of 910
REJ09B0350-0300
(8) P40/TMI0/TxD2/TCMCYI0
The pin function is switched as shown below according to the combination of the TMR and the
SCI and the P40DDR bit.
Setting
SCI I/O Port
Module
Name
Pin Function
TxD2_OE P40DDR
SCI TxD2 output 1 ⎯
I/O port P40 output 0 1
P40 input
(initial setting)
0 0
7.2.5 Port 5
(1) P52/SCL0
The pin function is switched as shown below according to the combination of the IIC0AS and
IIC0BS bits in PTCNT1, ICE bit in ICCR of IIC_0, and the P52DDR bit.
Setting
IIC_0 I/O Port
Module
Name
Pin Function
SCL0_OE P52DDR
IIC SCL0 input/output 1 ⎯
I/O port P52 output 0 1
P52 input
(initial setting)
0 0
Note: To use this pin as SCL0, clear the IIC0AS and IIC0BS bits in PTCNT1 to 0. The output
format for SCL0 is NMOS output only and direct bus drive is possible. When this pin is used
as the P52 output pin, the output format is NMOS push-pull.