Datasheet

Section 7 I/O Ports
Rev. 3.00 Sep. 28, 2009 Page 157 of 910
REJ09B0350-0300
(4) P44/TMO1/PWMU2B/TCMCYI2
The pin function is switched as shown below according to the combination of the TMR and
PWMU and the P44DDR bit.
Setting
TMR PWMU I/O Port
Module
Name
Pin Function
TMO1_OE PWMU2B_OE P44DDR
TMR TMO1 output 1 ⎯ ⎯
PWMU PWMU2B output 0 1 1
I/O port P44 output 0 0 1
P44 input
(initial setting)
0 ⎯ 0
(5) P43/TMI1/SCK2/TCMCKI1/TCMMCI1
The pin function is switched as shown below according to the combination of the SCI and the
P43DDR bit.
Setting
SCI I/O Port
Module
Name
Pin Function SCK2_OE P43DDR
SCI SCK2 input/output 1 ⎯
I/O port P43 output 0 1
P43 input
(initial setting)
0 0