Datasheet

Rev. 3.00 Sep. 28, 2009 Page xvii of xliv
REJ09B0350-0300
Item Page Revision (See Manual for Details)
19.4.4 LPC Interface Shutdown
Function (LPCPD)
Table 19.7 Scope of Initialization
in Each LPC interface Mode
643 Note amended
Note: System reset: Reset by RES pin input, or WDT
overflow
LPC reset: Reset by LPC hardware reset (HR)
or LPC software reset (SR)
LPC shutdown: Reset by LPC hardware
shutdown (HS) or LPC software shutdown (SS)
19.4.5 LPC Interface Serialized
Interrupt Operation (SERIRQ)
Table 19.8 Serialized Interrupt
Transfer Cycle Frame
Configuration
646 Table amended
Frame
Count
Drive
Source
Number
of StatesContents
IRQ013Slave
Notes
Serial Interrupt Transfer Cycle
20.3 Register Descriptions
Table 20.2 Register
Configuration
658 Table amended
Register Name
Data Bus
WidthAbbreviation
ADDRA
ADDRB
ADDRC
ADDRD
ADDRE
ADDRF
ADDRG
ADDRH
ADCSR
ADCR
R
R
R
R
R
R
R
R
R/W
R/W
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'0000
H'00
H'00
H'FC00
H'FC02
H'FC04
H'FC06
H'FC08
H'FC0A
H'FC0C
H'FC0E
H'FC10
H'FC11
16
16
16
16
16
16
16
16
8
8
A/D data register A
A/D data register B
A/D data register C
A/D data register D
A/D data register E
A/D data register F
A/D data register G
A/D data register H
A/D control/status register
A/D control register
R/W Initial Value
Address
20.7.2 Permissible Signal Source
Impedance
Figure 20.5 Example of Analog
Input Circuit
669 Figure amended
A/D converter equivalent circuit
This LSI
20 pF
C
in
=
10 pF
10 kΩ
Up to 5 kΩ
Low-pass
filter C
Up to 0.1 µF
Sensor output
impedance
Sensor input
20.7.6 Notes on Noise
Countermeasures
Figure 20.6 Example of Analog
Input Protection Circuit
671 Figure amended
AV
CC
*
1
*
1
AN0 to AN15
AV
SS
R
in
*
2
100 Ω
0.1 µF
AV
ref