Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Sep. 28, 2009 Page 134 of 910
REJ09B0350-0300
6.1.2 Wait State Control Register (WSCR)
Bit Bit Name
Initial
Value
R/W Description
7, 6 — All 1 R/W Reserved
The initial value should not be changed.
5 ABW 1 R/W Bus Width Control
The initial value should not be changed.
4 AST 1 R/W Access State Control
The initial value should not be changed.
3
2
WMS1
WMS0
0
0
R/W
R/W
Wait Mode Select 1 and 0
The initial value should not be changed.
1
0
WC1
WC0
1
1
R/W
R/W
Wait Count 1 and 0
The initial value should not be changed.