Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Sep. 28, 2009 Page 133 of 910
REJ09B0350-0300
Section 6 Bus Controller (BSC)
Since this LSI does not have an externally extended function, it does not have an on-chip bus
controller (BSC). Considering the software compatibility with similar products, you must be
careful to set appropriate values to the control registers for the bus controller.
6.1 Register Descriptions
The bus controller has the following registers.
Table 6.1 Register Configuration
Register Name Abbreviation R/W Initial Value Address
Data Bus
Width
Bus control register BCR R/W H'D3 H'FFC6 8
Wait state control register WSCR R/W H'F3 H'FFC7 8
6.1.1 Bus Control Register (BCR)
Bit Bit Name
Initial
Value
R/W Description
7 — 1 R/W Reserved
The initial value should not be changed.
6 ICIS0 1 R/W Idle Cycle Insertion
The initial value should not be changed.
5 BRSTRM 0 R/W Burst ROM Enable
The initial value should not be changed.
4 BRSTS1 1 R/W Burst Cycle Select 1
The initial value should not be changed.
3 BRSTS0 0 R/W Burst Cycle Select 0
The initial value should not be changed.
2 ⎯ 0 R/W Reserved
The initial value should not be changed.
1
0
IOS1
IOS0
1
1
R/W
R/W
IOS Select 1 and 0
The initial value should not be changed.