Datasheet

Rev. 3.00 Sep. 28, 2009 Page xv of xliv
REJ09B0350-0300
Item Page Revision (See Manual for Details)
17.4.5 Slave Receive Operation
Figure 17.15 Example of Slave
Receive Mode Operation Timing
(2) (MLS = 0)
547 Figure amended
ICDRR
[8] IRIC clear
[12] IRIC clear
[9] Set ACKB=1
[10] ICDR read (Data (n-1))
[10] ICDR read
(Data (n))
User processing
Data (n-2)
Data (n)
[8] IRIC clear
Data (n-1)
18.3 Register Descriptions
Table 18.2 Register
Configuration
564 Table amended
Channel Register Name Abbreviation R/W Address
Channel 0
Channel 1
Channel 2
Channel 3
Keyboard control register 2_0
Keyboard control register 2_1
Keyboard control register 2_2
Keyboard control register 2_3
KBCR2_0
KBCR2_1
KBCR2_2
KBCR2_3
R/W
R/W
R/W
R/W
H'F0
H'F0
H'F0
H'F0
H'FEDB
H'FEDF
H'FEE3
H'FFE3
8
8
8
8
Initial
Value
Data Bus
Width
18.3.2 Keyboard Buffer Control
Register 2 (KBCR2)
567 Table amended
Bit Bit Name R/W Description
7 to 4 ⎯ R/WAll 1 Reserved
These bits are always read as 1. The initial value
should not be changed.
Initial
Value
18.3.6 Keyboard Buffer Transmit
Data Register (KBTR)
572 Table amended
Bit Bit Name R/W Description
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
1
1
1
1
1
1
1
KBT7
KBT6
KBT5
KBT4
KBT3
KBT2
KBT1
KBT0
Keyboard Buffer Transmit Data Register 7 to 0
Initialized to H'FF at reset.
Initial
Value
18.4.8 Operation during Data
Reception
Figure 18.13 Receive Timing and
KCLK
581 Figure amended
KCLK
KCLK for
other PS 2
128910
0 1 7 Parity
Stop bit
Automatic I/O inhibit
Start bit
11
KD
KBF
18.4.9 KCLK Fall Interrupt
Operation
Figure 18.14 Example of KCLK
Input Fall Interrupt Operation
582 Note amended
Note: * The KBF setting timing is the same as the
timing of KBF setting and KCLK automatic I/O
inhibit bit generation in figure 18.11. When the
KBF bit is used as the KCLK input fall interrupt
flag, the automatic I/O inhibit function does not
operate.