Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Sep. 28, 2009 Page 109 of 910
REJ09B0350-0300
Vector Address Origin of
Interrupt
Source Name
Vector
Number
Advanced Mode ICR Priority
— Reserved for system use 24 H'000060 — High
WDT_0 WOVI0 (Interval timer) 25 H'000064 ICRA1
WDT_1 WOVI1 (Interval timer) 26 H'000068 ICRA0
— Address break 27 H'00006C —
A/D converter ADI (A/D conversion end) 28 H'000070 ICRB7
— Reserved for system use 29
⏐
32
H'000074
⏐
H'000080
—
External pin WUE15 to WUE8 33 H'000084 ICRD4
TPU_0 TGI0A (TGR0A input
capture/compare match)
TGI0B (TGR0B input
capture/compare match)
TGI0C (TGR0C input
capture/compare match)
TGI0D (TGR0D input
capture/compare match)
TGI0V (Overflow 0)
34
35
36
37
38
H'000088
H'00008C
H'000090
H'000094
H'000098
ICRD3
TPU_1 TGI1A (TGR1A input
capture/compare match)
TGI1B (TGR1B input
capture/compare match)
TGI1V (Overflow 1)
TGI1U (Underflow 1)
39
40
41
42
H'00009C
H'0000A0
H'0000A4
H'0000A8
ICRD2
TPU_2 TGI2A (TGR2A input
capture/compare match)
TGI2B (TGR2B input
capture/compare match)
TGI2V (Overflow 2)
TGI2U (Underflow 2)
43
44
45
46
H'0000AC
H'0000B0
H'0000B4
H'0000B8
ICRD1
— Reserved for system use 47 H'0000BC —
TCM_0 TICI0 (Input capture)
TCMI0 (Compare match)
TOVMI0 (Cycle overflow)
TUDI0 (Cycle underflow)
TOVI0 (Overflow)
48 H'0000C0
TCM_1 TICI1 (Input capture)
TCMI1 (Compare match)
TOVMI1 (Cycle overflow)
TUDI1 (Cycle underflow)
TOVI1 (Overflow)
49 H'0000C4
ICRB6
Low