Datasheet

Section 5 Interrupt Controller
Rev. 3.00 Sep. 28, 2009 Page 96 of 910
REJ09B0350-0300
5.3.5 IRQ Enable Registers (IER16, IER)
The IER registers enable and disable interrupt requests IRQ15 to IRQ0.
• IER16
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
IRQ15E
IRQ14E
IRQ13E
IRQ12E
IRQ11E
IRQ10E
IRQ9E
IRQ8E
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IRQn Enable
The IRQn interrupt request is enabled when this bit
is 1.
(n = 15 to 8)
• IER
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
IRQ7E
IRQ6E
IRQ5E
IRQ4E
IRQ3E
IRQ2E
IRQ1E
IRQ0E
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
IRQn Enable
The IRQn interrupt request is enabled when this bit
is 1.
(n = 7 to 0)