Datasheet

Rev. 3.00 Sep. 28, 2009 Page ix of xliv
REJ09B0350-0300
Main Revisions for This Edition
Item Page Revision (See Manual for Details)
1.3 Block Diagram
Figure 1.2 Internal Block
Diagram
8 Figure amended
PB
0
/L
SMI
P
B1
/L
S
C
I
PB
2
/RI/PW
M
U0
B
PB3
/DCD
/P
W
MU
1
B
P
B4
/
DSR
PB5/DTR P
B6/CTS
PB
7/
RTS
PC0/TIOCA0/W
U
E
8
PC
1
/TIOCB0
/W
UE9
PC2
/TIOC
C0
/TCL
KA/W
UE1
0
PC3/TIOCD0/
TC
L
KB/W
UE1
1
PC4/TIOCA1/W
U
E
12
PC5/TIOCB1/TCL
KC/
W
UE13
PC6/TIOCA2/W
UE
14
PC7/TIOCB2/TCL
KD/W
UE15
Port B
Port C
2.4.3 Extended Control Register
(EXR)
39 Table amended
Bit Bit Name R/W Description
7T R/W0 Trace Bit
This bit has no effect on the operation of the MCU.
Initial
Value
6 to 3 ⎯⎯All 1
Reserved
These bits are always read as 1.
2
1
0
⎯R/W
R/W
R/W
I2
I1
I0
Interrupt Request Mask Bits 2 to 0
These bits have no effect on the operation of the MCU.
2.4.4 Condition-Code Register
(CCR)
40 Table amended
Bit Bit Name R/W Description
6UI R/WUndefined User Bit or Interrupt Mask Bit
Can be read or written by software using the LDC, STC,
ANDC, ORC, and XORC instructions.
Initial
Value
6.1 Register Descriptions
Table 6.1 Register Configuration
133 Table amended
Register Name Abbreviation R/W Address
Data Bus
WidthInitial Value
Bus control register
Wait state control register
BCR
WSCR
R/W
R/W
H'FFC6
H'FFC7
8
8
H'D3
H'F3
6.1.2 Wait State Control Register
(WSCR)
134 Table amended
Bit Bit Name R/W Description
7, 6 ⎯ R/WAll 1 Reserved
The initial value should not be changed.
Initial
Value
7.2.16 Port G
(5) PG3/SCL2/ExIRQ11
182 Description amended
… When the ISS11 bit in ISSR16 is set to 1 and the
IRQ11E bit in IER16 of the interrupt controller is set to
1, this pin can be used as the ExIRQ11 input pin.