Datasheet

Index
Rev. 3.00 Mar 17, 2006 page 921 of 926
REJ09B0283-0300
Index
16-Bit Timer Pulse Unit.......................... 521
Buffer Operation................................. 566
Cascaded Operation ............................ 570
Free-running count operation.............. 560
Input Capture Function ....................... 563
periodic count operation ..................... 560
Phase Counting Mode......................... 577
PWM Modes....................................... 572
Synchronous Operation....................... 564
toggle output ....................................... 562
Waveform Output by Compare Match 561
8-Bit Timers............................................ 627
16-Bit Counter Mode .......................... 641
Compare Match Count Mode.............. 641
Operation with Cascaded Connection. 641
Pulse Output........................................ 636
TCNT Incrementation Timing ............ 637
Toggle output...................................... 646
A/D Converter ........................................ 741
Conversion Time................................. 753
DTC Activation................................... 585
External Trigger.................................. 756
Scan Mode .......................................... 752
Single Mode........................................ 752
Address Space........................................... 28
Addressing Modes .................................... 48
Absolute Address.................................. 50
Immediate ............................................. 51
Memory Indirect ................................... 51
Program-Counter Relative .................... 51
Register Direct ...................................... 49
Register Indirect.................................... 49
Register Indirect with Displacement..... 49
Register indirect with post-increment... 50
Register indirect with pre-decrement.... 50
Bcc ......................................................37, 45
Bus Controller.........................................121
Auto Refreshing ..................................218
Basic Bus Interface .............................158
Basic Operation Timing ..............160, 202
Basic Timing .......................................229
Burst ROM Interface...........................229
Bus Arbitration....................................255
Bus Release .........................................250
Chip Select (CS) Assertion Period
Extension States ..............................155
Data Size and Data Alignment ............158
DRAM Interface..................................173
Idle Cycle ............................................232
Read Strobe (RD) Timing ...................170
Self-Refreshing ...................................220
Synchronous DRAM Interface............198
Valid Strobes.......................................160
Wait Control........................................169
Write Data Buffer Function.................249
Clock Pulse Generator.............................811
PLL Circuit .........................................816
Condition Field .........................................47
Condition-Code Register (CCR) ...............32
CPU Operating Modes ..............................24
Advanced Mode ....................................26
Normal Mode .................................. 24, 25
D/A Converter.........................................763
data direction register..............................427
data register.............................................427
Data Transfer Controller .........................401
Activation by Software ...............416, 420
Block Transfer Mode ..........................414
Chain Transfer............................. 415, 422
Chain Transfer when Counter = 0.......423
DTC Vector Table...............................408