Datasheet

Section 24 Electrical Characteristics
Rev. 3.00 Mar 17, 2006 page 890 of 926
REJ09B0283-0300
Tp Tr Tc1 Tcw Tcwp Tc2 Tc3
φ
A23 to A0
RAS5 to RAS2
UCAS, LCAS
OE, RD
HWR
D15 to D0
UCAS, LCAS
OE
HWR
t
WTS
t
WTH
t
WTS
t
WTH
D15 to D0
WAIT
Read
Write
Tcw : Wait cycle inserted by programmable wait function
Tcwp: Wait cycle inserted by pin wait function
DACK0, DACK1
EDACK0, EDACK1
DACK and EDACK timing: when DDS = 0 and EDDS = 0
RAS timing: when RAST = 0
Notes:
Figure 24.18 DRAM Access Timing: Three-State Access, One Wait