Datasheet

Section 23 List of Registers
Rev. 3.00 Mar 17, 2006 page 856 of 926
REJ09B0283-0300
23.3 Register States in Each Operating Mode
Register
Abbreviation Reset
High-
Speed
Clock
Division Sleep
Module
Stop
All Module
Clock Stop
Software
Standby
Hardware
Standby Module
MRA Initialized Initialized DTC
SAR Initialized Initialized
MRB Initialized Initialized
DAR Initialized Initialized
CRA Initialized Initialized
CRB Initialized Initialized
SEMR
*
1
Initialized Initialized Initialized Initialized Initialized SCI2
EDSAR_0 Initialized Initialized EXDMA_C
EDDAR_0 Initialized Initialized
EDTCR_0 Initialized Initialized
EDMDR_0 Initialized Initialized
EDACR_0 Initialized Initialized
EDSAR_1 Initialized Initialized EXDMA_1
EDDAR_1 Initialized Initialized
EDTCR_1 Initialized Initialized
EDMDR_1 Initialized Initialized
EDACR_1 Initialized Initialized
EDSAR_2 Initialized Initialized
EDDAR_2 Initialized Initialized
EDTCR_2 Initialized Initialized
EDMDR_2 Initialized Initialized
EDACR_2 Initialized Initialized
EXDMA_2
EDSAR_3 Initialized Initialized EXDMA_3
EDDAR_3 Initialized Initialized
EDTCR_3 Initialized Initialized
EDMDR_3 Initialized Initialized
EDACR_3 Initialized Initialized
IPRA Initialized Initialized INT
IPRB Initialized Initialized
IPRC Initialized Initialized
IPRD Initialized Initialized
IPRE Initialized Initialized
IPRF Initialized Initialized