Datasheet

Section 22 Power-Down Modes
Rev. 3.00 Mar 17, 2006 page 832 of 926
REJ09B0283-0300
22.4 Usage Notes
22.4.1 I/O Port Status
In software standby mode, I/O port states are retained. Therefore, there is no reduction in current
dissipation for the output current when a high-level signal is output.
22.4.2 Current Dissipation during Oscillation Stabilization Standby Period
Current dissipation increases during the oscillation stabilization standby period.
22.4.3 EXDMAC/DMAC/DTC Module Stop
Depending on the operating status of the EXDMAC, DMAC, or DTC, the MSTP14 to MSTP12
bits may not be set to 1. Setting of the EXDMAC, DMAC, or DTC module stop mode should be
carried out only when the respective module is not activated.
For details, refer to section 8, EXDMA Controller, section 7, DMA Controller (DMAC), and
section 9, Data Transfer Controller (DTC).
22.4.4 On-Chip Peripheral Module Interrupts
Relevant interrupt operations cannot be performed in module stop mode. Consequently, if module
stop mode is entered when an interrupt has been requested, it will not be possible to clear the CPU
interrupt source or the EXDMAC, DMAC, or DTC activation source.
Interrupts should therefore be disabled before entering module stop mode.
22.4.5 Writing to MSTPCR
MSTPCR should only be written to by the CPU.