Datasheet

Section 19 Flash Memory (F-ZTAT Version)
Rev. 3.00 Mar 17, 2006 page 804 of 926
REJ09B0283-0300
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)
*
2
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
φ
VCC
FWE
t
OSC1
Min 0 µs
Min 0 µs
t
MDS
*
3
t
MDS
*
3
MD2 to MD0
*
1
RES
SWE bit
SWE set
SWE cleared
Programming/
erasing
possible
Wait time: x Wait time: 100 µs
Notes: 1. Except when switching modes, the level of the mode pins (MD2 to MD0) must be fixed until
power-off by pulling the pins up or down.
2. See section 24.6, Flash Memory Characteristics.
3. Mode programming setup time t
MDS
(min) = 200 ns
SWE set
SWE cleared
φ
VCC
FWE
t
OSC1
Min 0 µs
MD2 to MD0
*
1
RES
SWE bit
(2) User Program Mode
(1) Boot Mode
Programming/
erasing
possible
Wait time: x Wait time: 100 µs
t
MDS
*
3
Figure 19.12 Power-On/Off Timing (H8S/2678 Group)