Datasheet

Section 19 Flash Memory (F-ZTAT Version)
Rev. 3.00 Mar 17, 2006 page 782 of 926
REJ09B0283-0300
Bit Bit Name Initial Value R/W Description
7 FWE 0/1 R Flash Write Enable
Reflects the input level at the FWE pin. It is set to 1
when a high level is input to the FWE pin, and
cleared to 0 when a low level is input. When this bit
is cleared to 0, the flash memory transits to the
hardware protection state.
Note: In the H8S/2678R Group, this bit is
reserved. This bit is always read as 0 in
modes 1 and 2. This bit is always read as 1
in modes 3 to 7. The initial value should not
be changed.
6 SWE 0 R/W Software Write Enable
When this bit is set to 1, flash memory
programming/erasing is enabled. When this bit is
cleared to 0, other FLMCR1 register bits and all
EBR1 and EBR2 bits cannot be set.
5 ESU 0 R/W Erase Setup
When this bit is set to 1 while FWE = 1
*
and SWE
= 1, the flash memory transits to the erase setup
state. When it is cleared to 0, the erase setup state
is cancelled.
4 PSU 0 R/W Program Setup
When this bit is set to 1 while FWE = 1
*
and SWE
= 1, the flash memory transits to the program setup
state. When it is cleared to 0, the program setup
state is cancelled.
3 EV 0 R/W Erase-Verify
When this bit is set to 1 while FWE = 1
*
and SWE
= 1, the flash memory transits to erase-verify
mode. When it is cleared to 0, erase-verify mode is
cancelled.
2 PV 0 R/W Program-Verify
When this bit is set to 1 while FWE = 1
*
and SWE
= 1, the flash memory transits to program-verify
mode. When it is cleared to 0, program-verify
mode is cancelled.