Datasheet

Section 17 D/A Converter
Rev. 3.00 Mar 17, 2006 page 770 of 926
REJ09B0283-0300
Conversion data 1
Conversion
result 1
High-impedance state
t
DCONV
DADR0
write cycle
DA0
DAOE0
DADR0
Address
φ
DACR01
write cycle
Conversion data 2
Conversion
result 2
t
DCONV
Legend:
t
DCONV
: D/A conversion time
DADR0
write cycle
DACR01
write cycle
Figure 17.2 Example of D/A Converter Operation
17.5 Usage Notes
17.5.1 Setting for Module Stop Mode
It is possible to enable/disable the D/A converter operation using the module stop control register,
the D/A converter does not operate by the initial value of the register. The register can be accessed
by releasing the module stop mode. For details, see section 22, Power-Down Modes.
17.5.2 D/A Output Hold Function in Software Standby Mode
If D/A conversion is enabled and this LSI enters software standby mode, D/A output is held and
analog power supply current remains at the same level during D/A conversion. When the analog
power supply current is required to go low in software standby mode, bits DAOE0 to DAOE3 and
DAE should be cleared to 0, and D/A output should be disabled.