Datasheet

Section 17 D/A Converter
Rev. 3.00 Mar 17, 2006 page 769 of 926
REJ09B0283-0300
Table 17.3 Control of D/A Conversion
Bit 5
DAE
Bit 7
DAOE3
Bit 6
DAOE2 Description
0 0 0 D/A conversion disabled
1 Channel 2 D/A conversion enabled, channel3 D/A conversion
disabled
1 0 Channel 3 D/A conversion enabled, channel2 D/A conversion
disabled
1 Channel 2 and 3 D/A conversions enabled
1 0 0 D/A conversion disabled
1 Channel 2 and 3 D/A conversions enabled
10
1
17.4 Operation
The D/A converter includes D/A conversion circuits for four channels, each of which can operate
independently.
When DAOE bit in DACR01 or DACR23 is set to 1, D/A conversion is enabled and the
conversion result is output.
The operation example concerns D/A conversion on channel 0. Figure 17.2 shows the timing of
this operation.
[1] Write the conversion data to DADR0.
[2] Set the DAOE0 bit in DACR01 to 1. D/A conversion is started. The conversion result is output
from the analog output pin DA0 after the conversion time t
DCONV
has elapsed. The conversion
result is continued to output until DADR0 is written to again or the DAOE0 bit is cleared to 0.
The output value is expressed by the following formula:
256
DADR contents
× Vre
f
[3] If DADR0 is written to again, the conversion is immediately started. The conversion result is
output after the conversion time t
DCONV
has elapsed.
[4] If the DAOE0 bit is cleared to 0, analog output is disabled.