Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 3.00 Mar 17, 2006 page 730 of 926
REJ09B0283-0300
IrDA
Pulse encoder
Pulse decoder
TxD0/IrTxD
RxD0/IrRxD
SCI0
TxD
RxD
IrCR
Figure 15.33 Block Diagram of IrDA
Transmission: In transmission, the output signal (UART frame) from the SCI is converted to an
IR frame by the IrDA interface (see figure 15.34).
When the serial data is 0, a high pulse of 3/16 the bit rate (interval equivalent to the width of one
bit) is output (initial value). The high-level pulse can be varied according to the setting of bits
IrCKS2 to IrCKS0 in IrCR.
In the specification, the high pulse width is fixed at a minimum of 1.41 µs, and a maximum of
(3/16 + 2.5%) × bit rate or (3/16 × bit rate) + 1.08 µs. When system clock φ is 20 MHz, 1.6 µs can
be set for a high pulse width with a minimum value of 1.41 µs.
When the serial data is 1, no pulse is output.