Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 3.00 Mar 17, 2006 page 672 of 926
REJ09B0283-0300
Smart Card Interface Mode (When SMIF in SCMR is 1)
Bit Bit Name Initial Value R/W Description
7 TIE 0 R/W Transmit Interrupt Enable
When this bit is set to 1, TXI interrupt request is
enabled.
6 RIE 0 R/W Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt
requests are enabled.
5 TE 0 R/W Transmit Enable
When this bit is set to 1, transmission is enabled.
4 RE 0 R/W Receive Enable
When this bit is set to 1, reception is enabled.
3 MPIE 0 R/W Multiprocessor Interrupt Enable (enabled only
when the MP bit in SMR is 1 in asynchronous
mode)
Write 0 to this bit in Smart Card interface mode.
2 TEIE 0 R/W Transmit End Interrupt Enable
Write 0 to this bit in Smart Card interface mode.
1
0
CKE1
CKE0
0
0
R/W Clock Enable 1 and 0
Enables or disables clock output from the SCK
pin. The clock output can be dynamically switched
in GSM mode. For details, refer to section 15.7.8,
Clock Output Control.
When the GM bit in SMR is 0:
00: Output disabled (SCK pin can be used as an
I/O port pin)
01: Clock output
1X: Reserved
When the GM bit in SMR is 1:
00: Output fixed low
01: Clock output
10: Output fixed high
11: Clock output
X: Don’t care