Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Mar 17, 2006 page 665 of 926

REJ09B0283-0300

• Receive data register_1 (RDR_1)

• Transmit data register_1 (TDR_1)

• Serial mode register_1 (SMR_1)

• Serial control register_1 (SCR_1)

• Serial status register_1 (SSR_1)

• Smart card mode register_1 (SCMR_1)

• Bit rate register_1 (BRR_1)

• Receive shift register_2 (RSR_2)

• Transmit shift register_2 (TSR_2)

• Receive data register_2 (RDR_2)

• Transmit data register_2 (TDR_2)

• Serial mode register_2 (SMR_2)

• Serial control register_2 (SCR_2)

• Serial status register_2 (SSR_2)

• Smart card mode register_2 (SCMR_2)

• Bit rate register_2 (BRR_2)

• Serial extension mode register (SEMR)

Note: * Only in H8S/2678R Group.

15.3.1 Receive Shift Register (RSR)

RSR is a shift register used to receive serial data that is input to the RxD pin and convert it into

parallel data. When one byte of data has been received, it is transferred to RDR automatically.

RSR cannot be directly accessed by the CPU.

15.3.2 Receive Data Register (RDR)

RDR is an 8-bit register that stores receive data. When the SCI has received one byte of serial

data, it transfers the received serial data from RSR to RDR where it is stored. After this, RSR is

receive-enabled. Since RSR and RDR function as a double buffer in this way, enables continuous

receive operations to be performed. After confirming that the RDRF bit in SSR is set to 1, read

RDR for only once. RDR cannot be written to by the CPU.