Datasheet

Section 13 8-Bit Timers (TMR)
Rev. 3.00 Mar 17, 2006 page 638 of 926
REJ09B0283-0300
φ
External clock
input pin
Clock input
to TCNT
TCNT
N–1 N N+1
Figure 13.4 Count Timing for External Clock Input
13.5.2 Timing of CMFA and CMFB Setting when Compare-Match Occurs
The CMFA and CMFB flags in TCSR are set to 1 by a compare match signal generated when the
TCOR and TCNT values match. The compare match signal is generated at the last state in which
the match is true, just before the timer counter is updated. Therefore, when TCOR and TCNT
match, the compare match signal is not generated until the next incrementation clock input. Figure
13.5 shows this timing.
φ
TCNT
N N+1
TCOR N
Compare match
signal
CMF
Figure 13.5 Timing of CMF Setting