Datasheet

Section 1 Overview
Rev. 3.00 Mar 17, 2006 page 15 of 926
REJ09B0283-0300
Pin No.
Type Symbol
FP-144G
(H8S/2678
Group)
FP-144H
(H8S/2678R
Group)
I/O Function
Bus control RD 90 90 Output When this pin is low, it indicates that
the external address space is being
read.
HWR 89 89 Output Strobe signal indicating that external
address space is to be written, and
the upper half (D15 to D8) of the
data bus is enabled.
Write enable signal for DRAM
interface space.
LWR 88 88 Output Strobe signal indicating that external
address space is to be written, and
the lower half (D7 to D0) of the data
bus is enabled.
UCAS 86 86 Output Upper column address strobe signal
for 16-bit DRAM interface space.
Column address strobe signal for 8-
bit DRAM interface space.
LCAS 87 87 Output Lower column address strobe signal
for 16-bit DRAM interface space.
DQMU — 86 Output Upper data mask enable signal for
16-bit synchronous DRAM for 16-bit
synchronous DRAM interface.
Data mask enable signal for 8-bit
synchronous DRAM interface
space.
DQML — 87 Output Lower-data mask enable signal for
16-bit synchronous DRAM interface
space.
RAS/
RAS2
RAS3 to
RAS5
— 103 to 106 Output Row address strobe signal for the
synchronous DRAM interface.
RAS signal is a row address strobe
signal when areas 2 to 5 are set to
the continuous DRAM space.
RAS — 103 Row address strobe signal for the
synchronous DRAM of the
synchronous DRAM interface.