Datasheet

Section 12 Programmable Pulse Generator (PPG)
Rev. 3.00 Mar 17, 2006 page 612 of 926
REJ09B0283-0300
Bit Bit Name Initial Value R/W Description
7
to
4
— All 1 — Reserved
These bits are always read as 1 and cannot be
modified.
3
2
1
0
NDR3
NDR2
NDR1
NDR0
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 3 to 0
The register contents are transferred to the
corresponding PODRL bits by the output trigger
specified with PCR.
12.3.4 PPG Output Control Register (PCR)
PCR selects output trigger signals on a group-by-group basis. For details on output trigger
selection, refer to section 12.3.5, PPG Output Mode Register (PMR).
Bit Bit Name Initial Value R/W Description
7
6
G3CMS1
G3CMS0
1
1
R/W
R/W
Group 3 Compare Match Select 1 and 0
Select output trigger of pulse output group 3.
00: Compare match in TPU channel 0
01: Compare match in TPU channel 1
10: Compare match in TPU channel 2
11: Compare match in TPU channel 3
5
4
G2CMS1
G2CMS0
1
1
R/W
R/W
Group 2 Compare Match Select 1 and 0
Select output trigger of pulse output group 2.
00: Compare match in TPU channel 0
01: Compare match in TPU channel 1
10: Compare match in TPU channel 2
11: Compare match in TPU channel 3
3
2
G1CMS1
G1CMS0
1
1
R/W
R/W
Group 1 Compare Match Select 1 and 0
Select output trigger of pulse output group 1.
00: Compare match in TPU channel 0
01: Compare match in TPU channel 1
10: Compare match in TPU channel 2
11: Compare match in TPU channel 3