Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 515 of 926
REJ09B0283-0300
• PG3/CS3/RAS3
*
/CAS
*
, PG2/CS2/RAS2
*
/RAS
*
The pin function is switched as shown below according to the operating mode, bit EXPE, bit
PGnDDR, bit CSnE, and bits RMTS2 to RMTS0.
Operating
mode
1, 2, 4, 5, 6 3
*
, 7
EXPE — 0 1
CSnE 0 1 — 0 1
RMTS2 to
RMTS0
— Area n
normal space
Area n
DRAM
space
Area 3
synchro-
nous
DRAM
*
space
Area 2
synchro-
nous
DRAM
*
space
— — Area n
normal space
Area n
DRAM
space
Area 3
synchro-
nous
DRAM
*
space
Area 2
synchro-
nous
DRAM
*
space
PGnDDR0101 — — — 010101 — — —
Pin function PGn
input
PGn
output
PGn
input
CSn
output
RASn
output
CAS
*
output
RAS
*
output
PGn
input
PGn
output
PGn
input
PGn
output
PGn
input
CSn
output
RASn
output
CAS
*
output
RAS
*
output
(n = 3 or 2)
Note: * Only in H8S/2678R Group.
• PG1/CS1, PG0/CS0
The pin function is switched as shown below according to the operating mode, bit EXPE, bit
PGnDDR, and bit CSnE.
Operating
mode
1, 2, 4, 5, 6
3
*
, 7
EXPE — 0 1
CSnE 0 1 — 0 1
PGnDDR 0101010101
Pin function PGn
input
PGn
output
PGn
input
CSn
output
PGn
input
PGn
output
PGn
input
PGn
output
PGn
input
CSn
output
(n =1 or 0)
Note: * Only in H8S/2678R Group.