Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 497 of 926
REJ09B0283-0300
10.12.1 Port D Data Direction Register (PDDDR)
The individual bits of PDDDR specify input or output for the pins of port D.
PDDDR cannot be read; if it is, an undefined value will be read.
Bit Bit Name Initial Value R/W Description
7 PD7DDR 0 W
6 PD6DDR 0 W
5 PD5DDR 0 W
4 PD4DDR 0 W
3 PD3DDR 0 W
2 PD2DDR 0 W
1 PD1DDR 0 W
0 PD0DDR 0 W
• Modes 1, 2, 3
*
(EXPE = 1), 4, 5, 6, and 7 (when
EXPE = 1)
Port D is automatically designated for data
input/output.
• Modes 3
*
(EXPE = 1) and 7 (when EXPE = 0)
Port D is an I/O port, and its pin functions can be
switched with PDDDR.
Note: * Only in H8S/2678R Group.
10.12.2 Port D Data Register (PDDR)
PDDR stores output data for the port D pins.
Bit Bit Name Initial Value R/W Description
7 PD7DR 0 R/W
6 PD6DR 0 R/W
5 PD5DR 0 R/W
4 PD4DR 0 R/W
3 PD3DR 0 R/W
2 PD2DR 0 R/W
1 PD1DR 0 R/W
0 PD0DR 0 R/W
Output data for a pin is stored when the pin function
is specified to a general purpose I/O.