Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 477 of 926
REJ09B0283-0300
• P71/DREQ1/EDREQ1
The pin function is switched as shown below according to the combination of bit P71DDR and
bit DMACS in PFCR2.
P71DDR 0 1
P71 input P71 output
DREQ1 input
*
Pin function
EDREQ1 input
Note: * DREQ1 input when DMACS = 1.
• P70/DREQ0/EDREQ0
The pin function is switched as shown below according to the combination of bit P70DDR and
bit DMACS in PFCR2.
P70DDR 0 1
P70 input P70 output
DREQ0 input
*
Pin function
EDREQ0 input
Note: * DREQ0 input when DMACS = 1.