Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 475 of 926
REJ09B0283-0300
• P74/DACK0/EDACK0
The pin function is switched as shown below according to the combination of bit DMACS in
PFCR2, bit SAE0 in DMABCRH, bit AMS in EDMDR_0, and bit P74DDR.
Modes 1, 2, 3
*
(EXPE = 1), 4, 5, 6, 7 (EXPE = 1)
AMS 0 1
SAE0 0 1 —
DMACS — 0 1 —
P74DDR 0101——
Pin function P74
input
P74
output
P74
input
P74
output
DACK0
output
EDACK0
output
Modes 3
*
(EXPE = 0), 7 (EXPE = 0)
AMS —
SAE0 0 1
DMACS — 0 1
P74DDR 0101—
Pin function P74
input
P74
output
P74
input
P74
output
DACK0
output
Note: * Only in H8S/2678R Group.
• P73/TEND1/ETEND1
The pin function is switched as shown below according to the combination of bit DMACS in
PFCR2, bit TEE1 in DMATCR of the DMAC, bit ETENDE in EDMDR_1 of the EXDMAC,
and bit P73DDR.
Modes 1, 2, 3
*
(EXPE = 1), 4, 5, 6, 7 (EXPE = 1)
ETENDE 0 1
TEE1 0 1 —
DMACS — 0 1 —
P73DDR 0101——
Pin function P73
input
P73
output
P73
input
P73
output
TEND1
output
ETEND1
output