Datasheet

Rev. 3.00 Mar 17, 2006 page xlix of l
Table 24.4 Permissible Output Currents .................................................................................. 869
Table 24.5 Clock Timing ......................................................................................................... 871
Table 24.6 Control Signal Timing............................................................................................ 874
Table 24.7 Bus Timing............................................................................................................. 876
Table 24.8 Bus Timing............................................................................................................. 877
Table 24.9 DMAC and EXDMAC Timing .............................................................................. 898
Table 24.10 Timing of On-Chip Peripheral Modules................................................................. 902
Table 24.11 A/D Conversion Characteristics............................................................................. 906
Table 24.12 D/A Conversion Characteristics............................................................................. 906
Table 24.13 Flash Memory Characteristics................................................................................ 907