Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 457 of 926
REJ09B0283-0300
10.3.5 Port Function Control Register 2 (PFCR2)
P3ODR controls the I/O port.
Bit Bit Name Initial Value R/W Description
7
to
4
— All 0 — Reserved
These bits are always read as 0 and cannot be
modified.
3 ASOE 1 R/W AS Output Enable
Selects to enable or disable the AS output pin.
0: PF6 is designated as I/O port
1: PF6 is designated as AS output pin
2LWROE 1 R/WLWR Output Enable
Selects to enable or disable the LWR output pin.
0: PF3 is designated as I/O port
1: PF3 is designated as LWR output pin
1OES 1 R/WOE Output Select
Selects the OE output pin port when the OEE bit is
set to 1 in DRAMCR (enabling OE/CKE
*
output).
0: P35 is designated as OE output pin
1: PH3 is designated as OE/CKE
*
output pin
0 DMACS 0 R/W DMAC Control Pin Select
Selects the DMAC control I/O port.
0: PF65 to PF60 are designated as DMAC control
pins
1: PF75 to PF70 are designated as DMAC control
pins
Note: * Only in H8S/2678R Group.