Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 442 of 926
REJ09B0283-0300
• P10/PO8/TIOCA0
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR0, bits IOA3 to IOA0 in TIOR0H, and bits CCLR2
to CCLR0 in TCR0), bit NDER8 in NDERH, and bit P10DDR.
TPU channel 0
settings
(1) in table
below
(2) in table below
P10DDR — 0 1 1
NDER8 — — 0 1
P10 input P10 output PO8 outputPin function TIOCA0 output
TIOCA0 input
*
1
Note: 1. TIOCA0 input when MD3 to MD0 = B'0000 and IOA3 to IOA0 = B'10xx.
TPU channel 0
settings
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000 B'001x B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1xxx
B'0001 to B'0011
B'0101 to B'0111
B'xx00 Other
than
B'xx00
Other than B'xx00
CCLR2, CCLR0 — — — — Other
than
B'001
B'001
Output function — Output compare
output
—PWM
*
2
mode 1
output
PWM
mode 2
output
—
x: Don’t care
Note: 2. TIOCB0 output disabled.