Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 439 of 926
REJ09B0283-0300
P13/PO11/TIOCD0/TCLKB
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR0, bits IOD3 to IOD0 in TIOR0L, and bits CCLR2
to CCLR0 in TCR0), bits TPSC2 to TPSC0 in TCR0 to TCR2, bit NDER11 in NDERH, and
bit P13DDR.
TPU channel 0
settings
(1) in table
below
(2) in table below
P13DDR 0 1 1
NDER11 0 1
P13 input P13 output PO11 outputTIOCD0 output
TIOCD0 input
*
1
Pin function
TCLKB input
*
2
Notes: 1. TIOCD0 input when MD3 to MD0 = B'0000 or B’01xx and IOD3 to IOD0 = B'10xx.
2. TCLKB input when the setting for any of TCR0 to TCR2 is TPSC2 to TPSC0 = B'101.
TCLKB input when phase counting mode is set for channels 1 and 5.
TPU channel 0
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000
B'0100
B'1xxx
B'0001 to B'0011
B'0101 to B'0111
B'xx00 Other than B'xx00
CCLR2, CCLR0 Other
than
B'110
B'110
Output function Output compare
output
——PWM
mode 2
output
x: Don’t care