Datasheet

Section 10 I/O Ports
Rev. 3.00 Mar 17, 2006 page 434 of 926
REJ09B0283-0300
10.1.4 Pin Functions
Port 1 pins also function as PPG outputs, TPU I/Os, and EXDMAC outputs. The correspondence
between the register specification and the pin functions is shown below.
• P17/PO15/TIOCB2/TCLKD/EDRAK3
The pin function is switched as shown below according to the combination of the TPU channel
2 settings (by bits MD3 to MD0 in TMDR2, bits IOB3 to IOB0 in TIOR2, and bits CCLR1
and CCLR0 in TCR2), bits TPSC2 to TPSC0 in TCR0 and TCR5, bit NDER15 in NDERH, bit
EDRAKE in EDMDR3, and bit P17DDR.
Modes 1, 2, 3
*
3
(EXPE = 1), 4, 5, 6, 7 (EXPE = 1)
EDRAKE 0 1
TPU channel 2
settings
(1) in table
below
(2) in table below —
P17DDR — 0 1 1 —
NDER15 — — 0 1 —
P17
input
P17
output
PO15
output
EDRAK3
output
TIOCB2
output
TIOCB2 input
*
1
Pin function
TCLKD input
*
2
Modes 3
*
3
(EXPE = 0), 7 (EXPE = 0)
EDRAKE —
TPU channel 2
settings
(1) in table
below
(2) in table below
P17DDR — 0 1 1
NDER15 — — 0 1
P17 input P17 output PO15 outputTIOCB2 output
TIOCB2 input
*
1
Pin function
TCLKD input
*
2
Notes: 1. TIOCB2 input when MD3 to MD0 = B'0000 or B'01xx and IOB3 = 1.
2. TCLKD input when the setting for either TCR0 or TCR5 is TPSC2 to TPSC0 = B'111.
TCLKD input when channels 2 and 4 are set to phase counting mode.
3. Only in H8S/2678R Group.