Datasheet

Section 9 Data Transfer Controller (DTC)
Rev. 3.00 Mar 17, 2006 page 411 of 926
REJ09B0283-0300
The 24-bit SAR designates the DTC transfer source address and the 24-bit DAR designates the
transfer destination address. After each transfer, SAR and DAR are independently incremented,
decremented, or left fixed.
Figure 9.4 shows a flowchart of DTC operation, and table 9.2 summarizes the chain transfer
conditions (combinations for performing the second and third transfers are omitted).
Start
Read DTC vector
Next transfer
Read register information
Data transfer
Write register information
Clear activation flag
CHNE = 1?
End
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Transfer counter = 0
or DISEL = 1?
Clear DTCER
Interrupt exception
handling
CHNS = 0?
DISEL = 1?
Transfer
counter = 0?
Figure 9.4 Flowchart of DTC Operation