Datasheet

Rev. 3.00 Mar 17, 2006 page xliv of l
Tables
Section 1 Overview
Table 1.1 Pin Arrangement in Each Operating Mode ............................................................ 7
Table 1.2 Pin Functions..........................................................................................................13
Section 2 CPU
Table 2.1 Instruction Classification........................................................................................ 37
Table 2.2 Operation Notation................................................................................................. 38
Table 2.3 Data Transfer Instructions...................................................................................... 39
Table 2.4 Arithmetic Operations Instructions (1)................................................................... 40
Table 2.4 Arithmetic Operations Instructions (2)................................................................... 41
Table 2.5 Logic Operations Instructions ................................................................................ 42
Table 2.6 Shift Instructions .................................................................................................... 42
Table 2.7 Bit Manipulation Instructions (1)........................................................................... 43
Table 2.7 Bit Manipulation Instructions (2)........................................................................... 44
Table 2.8 Branch Instructions ................................................................................................ 45
Table 2.9 System Control Instructions................................................................................... 46
Table 2.10 Block Data Transfer Instructions ........................................................................... 47
Table 2.11 Addressing Modes.................................................................................................. 49
Table 2.12 Absolute Address Access Ranges .......................................................................... 50
Section 3 MCU Operating Modes
Table 3.1 MCU Operating Mode Selection............................................................................ 58
Table 3.2 Pin Functions in Each Operating Mode.................................................................. 64
Section 4 Exception Handling
Table 4.1 Exception Types and Priority................................................................................. 75
Table 4.2 Exception Handling Vector Table.......................................................................... 76
Table 4.3 Status of CCR and EXR after Trace Exception Handling...................................... 80
Table 4.4 Status of CCR and EXR after Trap Instruction Exception Handling ..................... 81
Section 5 Interrupt Controller
Table 5.1 Pin Configuration................................................................................................... 87
Table 5.2 Interrupt Sources, Vector Addresses, and Interrupt Priorities................................ 103
Table 5.3 Interrupt Control Modes......................................................................................... 107
Table 5.4 Interrupt Response Times....................................................................................... 114
Table 5.5 Number of States in Interrupt Handling Routine Execution Statuses..................... 115