Datasheet

Rev. 3.00 Mar 17, 2006 page xxxvii of l
Figure 8.45 Transfer End Interrupt Logic ............................................................................... 395
Figure 8.46 Example of Procedure for Restarting Transfer on Channel in which Transfer
End Interrupt Occurred ........................................................................................ 397
Section 9 Data Transfer Controller (DTC)
Figure 9.1 Block Diagram of DTC........................................................................................ 402
Figure 9.2 Block Diagram of DTC Activation Source Control............................................. 407
Figure 9.3 Correspondence between DTC Vector Address and Register Information.......... 408
Figure 9.4 Flowchart of DTC Operation............................................................................... 411
Figure 9.5 Memory Mapping in Normal Mode..................................................................... 413
Figure 9.6 Memory Mapping in Repeat Mode...................................................................... 414
Figure 9.7 Memory Mapping in Block Transfer Mode......................................................... 415
Figure 9.8 Operation of Chain Transfer................................................................................ 416
Figure 9.9 DTC Operation Timing (Example in Normal Mode or Repeat Mode)................ 417
Figure 9.10 DTC Operation Timing (Example of Block Transfer Mode,
with Block Size of 2) ........................................................................................... 417
Figure 9.11 DTC Operation Timing (Example of Chain Transfer)......................................... 418
Figure 9.12 Chain Transfer when Counter = 0........................................................................ 424
Section 11 16-Bit Timer Pulse Unit (TPU)
Figure 11.1 Block Diagram of TPU........................................................................................ 524
Figure 11.2 Example of Counter Operation Setting Procedure............................................... 559
Figure 11.3 Free-Running Counter Operation......................................................................... 560
Figure 11.4 Periodic Counter Operation ................................................................................. 561
Figure 11.5 Example of Setting Procedure for Waveform Output by Compare Match .......... 561
Figure 11.6 Example of 0 Output/1 Output Operation............................................................ 562
Figure 11.7 Example of Toggle Output Operation.................................................................. 562
Figure 11.8 Example of Setting Procedure for Input Capture Operation................................ 563
Figure 11.9 Example of Input Capture Operation................................................................... 564
Figure 11.10 Example of Synchronous Operation Setting Procedure....................................... 565
Figure 11.11 Example of Synchronous Operation .................................................................... 566
Figure 11.12 Compare Match Buffer Operation ....................................................................... 567
Figure 11.13 Input Capture Buffer Operation........................................................................... 567
Figure 11.14 Example of Buffer Operation Setting Procedure ................................................. 568
Figure 11.15 Example of Buffer Operation (1)......................................................................... 569
Figure 11.16 Example of Buffer Operation (2)......................................................................... 570
Figure 11.17 Cascaded Operation Setting Procedure................................................................ 571
Figure 11.18 Example of Cascaded Operation (1).................................................................... 571
Figure 11.19 Example of Cascaded Operation (2).................................................................... 572
Figure 11.20 Example of PWM Mode Setting Procedure......................................................... 574
Figure 11.21 Example of PWM Mode Operation (1)................................................................ 575